With the development of thin film transistor liquid crystal displays (Thin Film Transistor Liquid Crystal Display) towards high integration and low cost, a gate-driver on array (Gate-driver on Array, GOA for short) technology appears, namely a gate driving circuit is prepared on an array substrate to reduce the cost of a product on the material cost and the manufacturing process.
The gate driving circuit includes multiple stages of shift register units, and each stage of shift register unit is used for outputting a gate driving signal to a row of gate line on the array substrate. FIG. 1 is a schematic diagram of a shift register unit of an existing gate driving circuit; and FIG. 2 is a time sequence diagram of each signal input to the shift register unit shown in FIG. 1. As shown in FIG. 1 and FIG. 2, the gate driving circuit is prepared on an array substrate, and each stage of shift register unit 1 of the gate driving circuit includes a pull-up module, an output module and a pull-down module, wherein the pull-up module is used for controlling the turn-on of the output module through a pull-up node PU, the output module is used for outputting a first clock signal CLK as a gate driving signal during turn-on, and the pull-down module is used for controlling the turn-off of the pull-up module and/or the output module through a pull-down node PD. The pull-up module includes a first transistor 201, a second transistor 202, a seventh transistor 207 and a first capacitor C1; the output module includes a third transistor 203, a fourth transistor 204 and a signal output terminal OUTPUT; and the pull-down module includes a ninth transistor 209, a fifth transistor 205, an eighth transistor 208, a sixth transistor 206, a tenth transistor 210 and an eleventh transistor 211. The connection relation of the first transistor 201 to the eleventh transistor 211 and the first capacitor C1 is shown as FIG. 1. In the shift register unit, besides the input CLK signal serving as the gate driving signal, a CLKB signal is also input as a second clock signal, an STV signal is input as a start signal, an STV1 signal is input as a correction signal, a RESET signal is input as a reset signal, and a VGL signal is input as a low voltage signal.
In the shift register unit, the size of the active layer of each transistor (mainly the third transistor) is a key factor influencing the display effect of the TFT LCD; if the active layer in the third transistor is too small, the driving capability of the shift register unit may be insufficient, particularly at a low temperature, the carrier mobility is reduced, the driving capability of the shift register unit is seriously insufficient, and then abnormal display of the TFT LCD is caused; and if the active layer in the third transistor is too large, when the CLK is of a high level, the pull-up node PU may be coupled to increase the voltage of the pull-up node PU, so that the shift register unit outputs multiple signals (Multi outputs) to the outside, and then abnormal display of the TFT LCD is caused.